module Make: functor (Syntax : Camlp4.Sig.Syntax) -> sig .. end
functor (
Syntax
:
Camlp4.Sig.Syntax
) ->
sig
end
include Syntax
val print_interf : ?input_file:'a -> ?output_file:'b -> 'c -> unit
?input_file:'a -> ?output_file:'b -> 'c -> unit
val print_implem : ?input_file:'a -> ?output_file:'b -> 'c -> unit